To date, the highest light extraction for a light emitting diode device and a light emitting diode package (LED) (more chip-specific than package-specific) has generally been with small light emitting diode devices (˜300 micrometers×300 micrometers) as compared with “power chips” (light emitting diode devices of ˜0.9-1 mm×0.9-1 mm).
FIG. 1 is a schematic illustration of a conventional InGaN light emitting diode with two “top side” contacts. The light emitting diode typically includes a substrate, such as sapphire or SiC. The substrate may be insulating or semi-insulating. A buffer layer or layers is provided on the substrate. The buffer layer(s) may, for example, be AlN, GaN and/or AlGaN. An n-type GaN contact layer is provided on the buffer layer(s). Quantum well layers, typically of very thin InGaN and InAlGaN, are provided on the n-type contact layer. A p-type GaN contact layer is provided on the quantum well layers. An opening is provided in the p-type contact layer to provide an exposed n-contact region, and quantum well layers and an n-type contact are provided. A p-type contact region is provided on the p-type GaN contact layer. The periphery of the device may be defined by an etched trench and a passivation/protective layer provided on exposed surfaces of the active layers of the device. The passivation/protective layer may, for example, be an insulating layer, such as SiO2 or SiN. The light emitting diodes are typically formed on a wafer and then singulated into individual die for subsequent packaging or surface mounting. Nitride based light emitting diodes, and in particular, multi-quantum well nitride based light emitting diode are known to those of skill in the art. See for example, U.S. Pat. No. 6,958,497.
Efforts have been ongoing to develop ways by which light emitters can be used in place of incandescent lights, fluorescent lights and other light-generating devices in a wide variety of applications. In addition, where light emitting diodes (or other solid state light emitters) are already being used, efforts are ongoing to provide light emitting diodes (or other solid state light emitters) which have improved energy efficiency.
Various efforts have been directed at improving light emitting diodes on a common substrate. For example:
U.S. Pat. No. 6,635,503 describes cluster packaging of light emitting diodes;
United States Patent Application Publication No. 2003/0089918 describes broad spectrum light emitting devices and methods and systems for fabricating broad spectrum light emitting devices;
U.S. Pat. No. 6,547,249 describes monolithic series/parallel light emitting diode arrays formed on highly resistive substrates;
U.S. Pat. No. 7,009,199 describes electronic devices having a header and anti-parallel connected light emitting diodes for producing light from AC current;
U.S. Pat. No. 6,885,035 describes multi-chip semiconductor light emitting diode assemblies;
U.S. Pat. Nos. 7,213,942 and 7,221,044 each describe single chip integrated light emitting diodes adapted for direct use with a high AC or DC voltage;
United States Patent Application Publication No. 2005/0253151 describes a light emitting device operating on a high drive voltage and a small drive current;
Japanese Patent Publication No. 2001-156331 describes a plurality of nitride semiconductor layers formed on the same substrate, where the layers are electrically separated from each other and each nitride semiconductor layer is electrically connected with a conductive wire;
Japanese Patent Publication No. 2001-307506 describes two or more light emitting diodes being formed on the same semiconductor substrate; and
United States Patent Application Publication No. 2007/0202623 describes a wafer level package for very small footprint and low profile white light emitting diode devices.